1. Field of the Invention
The present invention relates to a pattern test method of testing a defect of a pattern on a sample formed by a charged beam lithography apparatus and, more particularly, to a pattern test method of testing not a whole test region but a specific test region.
2. Description of the Related Art
The electron beam lithography technique is attracting attention as next-generation lithography because this technique has a high pattern resolution and is a reticle-less process.
When drawing a pattern on a substrate coated with a photosensitive material, the limit of a region in which the pattern can be drawn with a stage on which the substrate is placed being stopped is the range within which a deflector can electrically deflect an electron beam. When actually forming a device pattern, after the pattern is drawn in this range, the stage is moved, and the pattern is drawn in an adjacent region. The whole device pattern is formed by repeating this operation, and connecting the individual deflection regions.
In this pattern drawing, a connection error sometimes occurs in the boundary portion between the deflection regions. As a pattern defect element in electron beam lithography, the problem of this connection error is very serious and generally caused by a lithography apparatus. Also, the fabrication process causes defects in addition to this defect caused by a lithography apparatus.
As a method of detecting a defect of electron beam lithography as a reticle-less process, a test (database test) by comparison of a real pattern formed on a substrate with drawing pattern data is effective (e.g., Jpn. Pat. Appln. KOKAI Publication No. 2005-250106). However, database test of an entire substrate takes a very long time.
As described above, both an electron beam lithography apparatus and the fabrication process cause defects of a pattern formed on a sample by the lithography apparatus. Any conventional test method does not distinguish between these defects. For example, any conventional test method tests defects caused by both a lithography apparatus and the fabrication process even when it is necessary to test only defects caused by the lithography apparatus. This decreases the test throughput.